After an integrated circuit is developed and designed, the designed integrated circuit is fabricated on chips by foundries. Nonetheless, during the fabrication process of modern increasingly complex chips, few products are fabricated successfully at the first time and need no further modifications afterwards. Most circuits need repeated revisions. For saving development costs, revisions can be categorized as all layer change and metal change. The former changes all masks from the substrate to the topmost metal layer; the latter changes only the masks of metal layers. According to the number of changed metal layers, different costs occur. Thereby, for the purpose of cost control, how to change as few metal layers as possible during revisions is the main challenge. Besides, during revisions, in addition to correct errors in circuits, it is required to record the version number in the chip. However, changing the version number needs to modify the layout of the internal circuit of the chip. In digital circuits, routing usually follows rules. For example, wires in odd layers are usually routed vertically, while those in even layers are usually routed horizontally. Thereby, once the change of a wire happens at its own corner, three layers of masks have to be changed. It turns out that the number of masks needing to change for revision may possibly greater than that for correcting errors.
Accordingly, the present invention provides a layout structure and a version control circuit for integrated circuits, which can avoid increases in costs by not using excessive masks while changing the layout structure, and thus the problem described above can be solved.